1. Field of the Invention
The present invention relates to a method for forming a gate electrode in a semiconductor device, and more particularly, to a method for forming a gate electrode having a narrow line width.
2. Description of the Related Art
Semiconductor memory devices may be categorized as random access memory (“RAM”) devices and read only memory (“ROM”) devices. Generally, the RAM devices, such as dynamic random access memory (“DRAM”) devices and static random access memory (“SRAM”) devices, are volatile devices that lose data after a lapse of time. The data processing time for RAM devices, such as for input and/or output of data, is generally very fast. In contrast, ROM devices can generally maintain data indefinitely, but the data processing time for ROM devices is relatively slow. It is desirable for semiconductor memory devices to have a high degree of integration to form a great number of chips on a semiconductor substrate. Thus, the critical dimension (“CD”) of patterns accommodated in the memory devices becomes narrow. One or more transistor gate electrodes are typically included in each cell of a semiconductor memory device. Accordingly, the CD for the gate electrodes of these transistors becomes narrow.